1. Field of the Invention
The present invention relates to a design support apparatus, design support method and design support program for supporting a design of a semiconductor integrated circuit, and, in particular, relates to a design support apparatus and the like for supporting design when using diagonal wiring to make connections between cells (formed by combining a plurality of logical gates to implement different functions) contained in a semiconductor integrated circuit.
2. Description of the Related Art
Generally, wiring in a semiconductor integrated circuit is performed after arranging, on a silicon wafer as a substrate, cells (e.g. a flipflop, counter, selector, multiplexer, adder, etc.) for combining a plurality of logical gates to implement different functions. A semiconductor integrated circuit has a multilayer structure where several wiring layers, such as aluminum or the like, are superimposed on top of one another, in which an output terminal of a certain semiconductor device contacting the bottom layer is connected with an input terminal of another semiconductor device by using these wiring layers.
In each of the wiring layers, there is arranged vertical wiring or horizontal wiring when viewing from the top of the wiring layers. Recently, however, in addition to vertical or horizontal wiring, there has been suggested a semiconductor integrated circuit in which wiring in a diagonal direction (e.g. 45 degree direction, 135 degree direction) is used. According to Japanese Patent Application Laid-Open No. H5-243379, for example, there is proposed a semiconductor integrated circuit device for reducing a wiring region by means of multilevel wiring including diagonal wiring. According to Japanese Patent Application Laid-Open No. 2000-82743, there is proposed a semiconductor integrated circuit device in which the positions of connection holes for connecting the wiring layers with each other are adjusted when using diagonal wiring. Also according to Japanese Patent Application Laid-Open No. H1-112749, there is proposed a semiconductor integrate circuit in which the pitch interval between the diagonal wiring is made to have a predetermined length, whereby cosstalk is prevented.
When designing a semiconductor integrated circuit, a designer uses an information processing device, such as a PC (personal computer) and the like, and dedicated software tools to represent the state where the cells are arranged on a substrate. Wiring between the cells planned in the designing step is performed manually by the designer, or automatically by the dedicated tools.